Introductory Digital Design: a_programmable_approach by Mark S. Nixon (auth.)

By Mark S. Nixon (auth.)

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This is a guarantee that if an input is within the range specified for the input levels then the output of the circuit is guaranteed to be within a range specified for the output voltage levels. If you buy a circuit which does not conform to this specification you can return it to the manufacturer for replacement. If an input voltage level falls outside the range specified for a valid logic level then it naturally becomes invalid and the circuit will not respond correctly. This might occur because noise has corrupted the transmission line connecting two logic gates.

Since both NAND and NOR gates can be used to implement OR and AND, respectively, by inverting the inputs any function can be implemented using NAND or NOR gates only. 11. Combinational Logic Design 31 De Morgan's law is true semantically, too. Compare 'I cannot water the garden with a leaky bucket and no water' with '/ can only water the garden with a good bucket and water'. You can therefore use de Morgan's law to simplify complicated IF statements when programming. Two other laws can be derived from this algebra: A+A·B=A A+A·B=A+B For proof, for the first of these A+ A · B =A · (1 +B)= A · 1 =A for the second, by substitution for A + A · B = A, then A+ A · B =A+ A · B + A · B =A+ B(A + A)= A+ B · 1 =A+ B These give reduced circuits: A+A·B A--------A A+AB In other words, why use gates when they are redundant?

Since they only approximate their perfect version they have resistance. Their resistance implies that the voltage across them increases with an increase in the current through them. When the voltage drop increases the output voltage falls, eventually to beneath that guaranteed as a valid output. The increase in current will be due to increasing the number of gates connected to the output. If we connect more gates than the specified maximum (the fan-out of the device), the output voltage level will not be valid as specified for the device.

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