By Barry L. Klein
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It is a full ADSR envelope generator with a 0- to 10-V output level. It has a 10,000 to 1 (1 ms to more than 10 seconds) time range, with an internal exponential converter providing an input control voltage sensitivity of 60 mV per decade. The sustain range is linearly controlled from 0 to 100 percent. Fig. 3-14 shows an ADSR circuit using the SSM2050 designed by RC. Blakey of Digisound Ltd. 2K CMOS GATE -15 V :------------ --- -- i , ,, , ,, ,, , l",J SI (SEE TEXn i+~ , , , ,,, , ,, ,, ,,, ,, +15 V C4!
5' ca ; ca ~ ~ ~ jo ~ ~ ~ , ,. ::I ,. ATTACK DECAY RELEASE +15 V 47K i n -~ ~ CV INPUTS (0-10 V) R7 R6 R5 ~~" lOOK +15 V R4 41. " R8 RI3 :::. ~ 010. 5000 pF. Capacitor Cl is the storage capacitor for the circuit and should be a polyester or polystyrene capacitor for good stability. Fig. C. Blakey of Digisound. 6 The circuit uses a Curtis Electromusic Specialties CEM3310 Ie. 5 volts. Increasingly negative voltages will result in longer attack, decay, and release times. 5 volts. This voltage will be the sustain voltage of the output envelope.
F (A) Circuit. AR ENVELOPE J '-,--- (8) Waveforms. Fig. 3-10. 54 An attack-release (AR) envelope generator. 03 IN914 OR SIMILAR GATE AD ENVELOPE Fig. 3-11. J\..... _ _ __ An attack-decay (AD) envelope generator. input causes a pulse to be generated, setting the Q output of the RS flip-flop (4001) high. This I5-volt signal (the CMOS uses a + I5-V power supply) passes through D2 and R3 and charges C3. Op amp A2 buffers the voltage on C3. As this voltage rises above 10 volts, the output of comparator Al will go high (15 volts).